feat[fastlanes]: add optimized 1024-bit transpose implementations

[joseph-isaacs]

Add a new transpose module implementing the FastLanes 1024-bit transpose
algorithm with multiple optimized implementations:

• Baseline: bit-by-bit reference implementation using fastlanes transpose_index
• Scalar: optimized byte-level implementation (~2.6x faster than baseline)
• AVX2: SIMD-accelerated version for x86_64 with AVX2 support
• AVX2+GFNI: uses Galois Field instructions when available
• AVX-512+GFNI: full 512-bit vector implementation

Also includes inverse (untranspose) operations and comprehensive unit tests
comparing all implementations against the baseline. Divan benchmarks are
provided to measure performance.

Signed-off-by: Claude noreply@anthropic.com

[codspeed-hq]

Merging this PR will degrade performance by 29.9%

⚠️ Unknown Walltime execution environment detected

Using the Walltime instrument on standard Hosted Runners will lead to inconsistent data.

For the most accurate results, we recommend using CodSpeed Macro Runners: bare-metal machines fine-tuned for performance measurement consistency.

⚡ 3 improved benchmarks
❌ 7 regressed benchmarks
✅ 1252 untouched benchmarks
🆕 16 new benchmarks
⏩ 1290 skipped benchmarks¹

⚠️ Please fix the performance issues or acknowledge them on CodSpeed.

Performance Changes

	Mode	Benchmark	BASE	HEAD	Efficiency
⚡	WallTime	u8_FoR[10M]	71.7 µs	5.6 µs	×13
❌	Simulation	canonical_into_non_nullable[(10000, 100, 0.0)]	1.9 ms	2.7 ms	-29.9%
❌	Simulation	canonical_into_non_nullable[(10000, 100, 0.1)]	3.7 ms	4.5 ms	-18.26%
❌	Simulation	canonical_into_non_nullable[(10000, 100, 0.01)]	2.1 ms	3 ms	-27.53%
⚡	Simulation	canonical_into_nullable[(10000, 10, 0.0)]	528.5 µs	445.6 µs	+18.61%
⚡	Simulation	canonical_into_nullable[(10000, 100, 0.0)]	4.9 ms	4.1 ms	+19.6%
❌	Simulation	into_canonical_non_nullable[(10000, 100, 0.0)]	1.9 ms	2.7 ms	-29.38%
❌	Simulation	into_canonical_non_nullable[(10000, 100, 0.01)]	2.2 ms	3 ms	-26.6%
❌	Simulation	into_canonical_non_nullable[(10000, 100, 0.1)]	3.8 ms	4.6 ms	-17.54%
❌	Simulation	into_canonical_nullable[(10000, 100, 0.0)]	4.4 ms	5.2 ms	-15.61%
🆕	Simulation	transpose_baseline_throughput	N/A	2.5 ms	N/A
🆕	Simulation	transpose_baseline	N/A	10.9 µs	N/A
🆕	Simulation	transpose_best_throughput	N/A	92.8 µs	N/A
🆕	Simulation	transpose_best	N/A	2 µs	N/A
🆕	Simulation	transpose_scalar	N/A	3.4 µs	N/A
🆕	Simulation	untranspose_best	N/A	2.8 µs	N/A
🆕	Simulation	transpose_scalar_throughput	N/A	661 µs	N/A
🆕	Simulation	transpose_scalar_fast	N/A	1.7 µs	N/A
🆕	Simulation	untranspose_baseline	N/A	10.9 µs	N/A
🆕	Simulation	transpose_scalar_fast_throughput	N/A	64.2 µs	N/A
...	...	...	...	...	...

ℹ️ Only the first 20 benchmarks are displayed. Go to the app to view all benchmarks.

---

_{Comparing claude/bitpacking-transpose-optimization-tM1U4 (2cbd439) with develop (13f120f)}

Footnotes

1. 1290 benchmarks were skipped, so the baseline results were used instead. If they were deleted from the codebase, click here and archive them to remove them from the performance reports. ↩

[joseph-isaacs]

claude says

Summary

Fast implementations of the FastLanes 1024-bit transpose operation with multiple SIMD backends.

Performance Results (cycles/call, lower is better)

Implementation	Cycles	Speedup vs Baseline
baseline	3569	1.0x
scalar	1534	2.3x
scalar_fast	129	27.7x
bmi2	131	27.2x
avx2	561	6.4x
avx2_gfni	205	17.4x
avx512_gfni	126	28.3x

Implementations

• baseline: Bit-by-bit reference implementation
• scalar: Byte-at-a-time loop processing
• scalar_fast: 8x8 bit matrix transpose using XOR/shift butterfly pattern
• bmi2: Fully unrolled PEXT/PDEP (128 operations, 12% faster than looped)
• avx2: Shuffle-based permutation with vpshufb
• avx2_gfni: GFNI gf2p8affineqb for 8x8 bit transpose
• avx512_gfni: Same as avx2_gfni with 512-bit registers (fastest)
• aarch64_neon: ARM64 NEON using same 8x8 bit matrix algorithm

Runtime Dispatch

transpose_1024_best() automatically selects the fastest available:

1. AVX-512 + GFNI (~126 cycles)
2. AVX2 + GFNI (~205 cycles)
3. BMI2 (~131 cycles)
4. AVX2 (~561 cycles)
5. scalar_fast (~129 cycles)
6. NEON on AArch64

Verification

• All implementations verified against fastlanes crate's transpose() function
• Roundtrip tests: transpose(untranspose(x)) == x
• 21 tests covering all implementations

Test plan

• cargo test -p vortex-fastlanes --lib transpose - all 21 tests pass
• cargo clippy -p vortex-fastlanes --all-targets --all-features - no warnings
• Performance verified with perf_transpose example