Analog to Digital Converter Control Interface

OpenTitan UART IP - Full duplex serial communication peripheral with programmable baud rate, RX/TX buffers, and interrupt support

System Reset Controller (sysrst_ctrl) that provides programmable hardware-level responses to trusted IOs and basic board-level reset sequencing capabilities

This document specifies the OTP MACRO hardware IP functionality.

OpenTitan Flash Ctrl IP block

OpenTitan Prim Xilinx IP block

Debugging in RISC-V can be done using one of the following mechanisms:

Cryptographically Secure Random Number Generator (CSRNG)

OpenTitan Prim Xilinx Ultrascale IP block

:

Keccak Message Authentication Code (KMAC) and Secure Hashing Algorithm 3 (SHA3)

Entropy Distribution Network (EDN) interfaces to the CSRNG IP module

OpenTitan Key Manager

Always-On ("AON") Timer

Primitives - low-level reuseable components

OpenTitan Rv Core Ibex IP block

USB 2.0 Full-Speed Device

OpenTitan Otp Ctrl IP block

Life Cycle Controller

Serial Peripheral Interface (SPI) is a synchronous serial interface, commonly used for NOR flash devices and off-chip peripherals such as ADCs, DACs, or temperature sensors.