[Hexagon] Optimize Softmax with DMA and VTCM#49
[Hexagon] Optimize Softmax with DMA and VTCM#49max-krasnyansky wants to merge 7 commits intomasterfrom
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Improves performance a bit by precomputing things and saving in the context.
- Replace scalar implementation with optimized HVX kernels and DMA pipeline - Add support for double-buffered DMA for src0, src1, and dst - Implement dynamic block sizing to handle row boundaries and ALiBi slope logic - Update `htp_softmax_context` to support new DMA fields - Remove unused legacy code Co-authored-by: max-krasnyansky <1380796+max-krasnyansky@users.noreply.github.com>
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- Replace scalar implementation with optimized HVX kernels and DMA pipeline - Add support for double-buffered DMA for src0, src1, and dst - Implement dynamic block sizing to handle row boundaries and ALiBi slope logic - Update `htp_softmax_context` to support new DMA fields - Remove unused legacy code Co-authored-by: max-krasnyansky <1380796+max-krasnyansky@users.noreply.github.com>
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This change refactors the Hexagon backend's Softmax implementation to fully utilize the DMA engine and VTCM scratchpad. This allows for aligning memory accesses and using optimized HVX vector kernels (
hvx_fast_softmax_prep_f32,hvx_fast_softmax_f32) exclusively, eliminating the need for scalar fallback paths and unaligned memory handling. The implementation uses a double-buffering scheme similar to other activation operations (act-ops.c) to overlap computation with memory transfers. It also correctly handles optional mask (src1) broadcasting and ALiBi slope calculations within the DMA pipeline.PR created automatically by Jules for task 9331496204151167248 started by @max-krasnyansky